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    An Efficient Parallel Structure for ΣΔ Modulators for use in High Speed Switching Power Amplifiers


    Farrell, Ronan (2007) An Efficient Parallel Structure for ΣΔ Modulators for use in High Speed Switching Power Amplifiers. In: Proceedings of 2007 European Conference on Circuit Theory and Design, 26th - 30th August 2007, Sevilla, Spain.

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    Abstract

    Switching amplifiers using Sigma-delta modulators have proven to be highly efficient but require high switching speeds. Implementing complete digital systems at the switching speed has prevented their use in higher speed applications. In this paper we propose a methodology for the parallelisation of sigma-delta modulators allowing for the partition of the switching amplifier into a low-speed and high speed sections. This will enable switching amplifiers to be used effectively at higher frequencies, and specifically for wireless applications.

    Item Type: Conference or Workshop Item (Paper)
    Additional Information: Copyright Notice "©2007 IEEE. Reprinted from Proceedings of 2007 European Conference on Circuit Theory and Design Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE." http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4529695&isnumber=4529518
    Keywords: Power amplifiers; Sigma-delta modulation; Complete digital systems; High speed switching power amplifiers; Parallel structure.
    Academic Unit: Faculty of Science and Engineering > Electronic Engineering
    Item ID: 1344
    Depositing User: Ronan Farrell
    Date Deposited: 25 May 2009 16:15
    Refereed: Yes
    URI:
    Use Licence: This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here

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