Daniels, Brian and Farrell, Ronan
Design of Fourth Order Digital PLLs
Using Filter Prototypes.
In this paper an investigation of different filter
prototypes and their applicability to digital phase locked
loop design is carried out. A novel design technique using
the superior filter prototype for the 4th order Digital PLL is
also introduced. The optimum choice of each design
parameter is considered, while maintaining realisable
component values as a priority. Finally the proposed
design technique is used to design a 4th order Digital PLL
with optimum filter cut-off, stability and lock time. This 4th
order design method is an improvement on existing
methods that exist in the literature to date, this is verified
using simulation of a Digital PLL designed using the
Conference or Workshop Item
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||Digital PLLs, Filter Prototypes
||Faculty of Science and Engineering > Electronic Engineering
Dr. Ronan Farrell
||04 Jul 2007
||IEEE: Institute of Electrical and Electronics Engineers
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