Design of Fourth Order Digital PLLs Using Filter Prototypes

Daniels, Brian and Farrell, Ronan (2006) Design of Fourth Order Digital PLLs Using Filter Prototypes. In: UNSPECIFIED.

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In this paper an investigation of different filter prototypes and their applicability to digital phase locked loop design is carried out. A novel design technique using the superior filter prototype for the 4th order Digital PLL is also introduced. The optimum choice of each design parameter is considered, while maintaining realisable component values as a priority. Finally the proposed design technique is used to design a 4th order Digital PLL with optimum filter cut-off, stability and lock time. This 4th order design method is an improvement on existing methods that exist in the literature to date, this is verified using simulation of a Digital PLL designed using the proposed technique.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Copyright © 2005 IEEE.   Reprinted from  (relevant publication info). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of NUI Maynooth ePrints and eTheses Archive's products or services.  Internal or personal use of this material is permitted.  However, permission for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to By choosing to view this document, you agree to all provisions of the copyright laws protecting it.
Keywords: Digital PLLs, Filter Prototypes
Academic Unit: Faculty of Science and Engineering > Electronic Engineering
Item ID: 587
Depositing User: Dr. Ronan Farrell
Date Deposited: 04 Jul 2007
Publisher: IEEE: Institute of Electrical and Electronics Engineers
Refereed: Yes

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